All posts tagged: Computer Science

E-CoRe reversible computing project targets EU energy-efficient computing

E-CoRe reversible computing project targets EU energy-efficient computing

Published by skeptic

The EU-funded E-CoRe initiative aims to cut digital energy use by rethinking computing from the ground up. Digital infrastructure already consumes a significant share of the world’s electricity, and that demand is climbing as artificial intelligence, cloud platforms and distributed systems expand. Against that backdrop, a new European research initiative is focusing on reversible computing as a potential path toward large-scale energy savings in information technology. The project, known as E-CoRe (Energy-efficient Computing via Reversibility), is coordinated by the University of Bologna and supported through the Marie Skłodowska-Curie Doctoral Networks programme. It brings together seven core European partners, spanning universities and research centres, along with eight additional associated partners from academia and industry. Why energy-efficient computing needs a new approach Computers consume energy not only when performing calculations but also when discarding information. According to fundamental physical principles, erasing a bit of information carries an unavoidable energy cost – a constraint often described through the Landauer limit. In conventional computing systems, information is routinely overwritten or deleted, resulting in cumulative energy losses. Reversible computing takes …

Why Sierra the Supercomputer Had to Die

Why Sierra the Supercomputer Had to Die

Published by skeptic

Supercomputers can be measured in several ways, but the vital statistic is their ability to perform floating-point operations per second, or flops. Flopping as fast as possible is what makes you successful. At her peak, Sierra could hit 94.64 petaflops—94.64 quadrillion floating-point operations—per second. El Capitan, at 1.809 exaflops, is about 19 times faster. In late 2025, he was officially declared the world’s fastest supercomputer. Sierra’s juice, Neely says, was no longer worth the squeeze. There was no big red button, no giant lever, that turned Sierra off. Someone could’ve just cut the cords, sure, but that’s not the recommended procedure. First, Sierra’s user scientists were warned, via email, to save their work. Then a DNR was formally instituted—no new parts. The decommissioning proceeded in phases, starting with the compute nodes and the rack switches—management nodes are last, since they’re needed until the very end. The process involves running scripts that, digitally, shut the computer down, and then hard power switches are flipped off too. There’s also a dehydration. When she was alive, Sierra could …

£76m for national compute to solve critical industry challenges

£76m for national compute to solve critical industry challenges

Published by skeptic

UK Research and Innovation (UKRI) has announced a £76m investment to launch four new National Compute Resources (NCRs). Major funding for national computing will provide the powerful “digital engines” needed to solve some of society’s biggest challenges, from healthcare to climate change. Science and Technology Facilities Council (STFC) Programme Director Richard Gunn explained: “This investment marks a pivotal moment in our mission to build a world-class, integrated compute ecosystem for the UK. “By establishing these four National Compute Resources, we are delivering directly on the ambitions set out in the 2025 UK Compute Roadmap and providing the ‘cornerstone’ infrastructure needed to push the boundaries of British research.” A new era for UK research This £76m public investment is the first major step in delivering the UK Compute Roadmap, a national plan launched in July 2025 to make the UK a global leader in high-tech research. While supercomputing was once reserved for niche technical fields, these four new resources are designed for everyone in the research community. Whether a scientist is mapping the human genome, an …

NPL upgrades UK Network Time Protocol services

NPL upgrades UK Network Time Protocol services

Published by skeptic

The UK’s National Physical Laboratory (NPL) has launched an upgraded Network Time Protocol (NTP) service, reinforcing the country’s national timing infrastructure. The improvements are part of the broader National Timing Centre (NTC) programme, which aims to provide a distributed, resilient framework for accurate time and frequency across the UK. Accurate timekeeping is essential for modern digital operations, from financial transactions to communication networks. NTP enables computers and devices to align their internal clocks with reliable external references. Without regular synchronisation, clocks can drift, potentially causing errors or vulnerabilities in systems that depend on precise timing. Dr Leon Lobo, Head of the NTC programme at NPL, added: “Precise and resilient timekeeping is fundamental to the UK’s digital infrastructure. “This updated service reflects our commitment to supporting the reliability and security of essential systems we depend on, technological innovation and economic growth.” Expanding the UK’s timing infrastructure NPL’s revised Network Time Protocol service now operates five stratum 1 servers across three separate UK locations, up from two previously. These servers are connected directly to NPL’s atomic clocks, …

How bee brains are shaping next-generation computer chips

How bee brains are shaping next-generation computer chips

Published by skeptic

Tom Cassauwers discusses how researchers are creating computer chips inspired by bee brains and their impacts for the field of robotics. Bees navigate their surroundings with astonishing precision. Their brains are now inspiring the design of tiny, low-power chips that could one day guide miniature robots and sensors. When a bee leaves the nest, it already has its own version of a GPS in its head. By analysing patterns in the sky and its flying speed, a bee can keep track of its location and safely return home. Researchers are now taking their cue from this, hoping to transform how computers navigate. “A bee finds its way back without a smartphone or satellite navigation,” said Anders Mikkelsen, professor at Lund University in Sweden. “They do this by looking at the polarisation of the sky, and their speed. Based on that, they don’t get lost.” Mikkelsen is part of a group of scientists in an EU-funded initiative named InsectNeuroNano who want to replicate the bee’s internal navigation system on a computer chip. Today’s chips can already …

Composability for powerful edge computing

Composability for powerful edge computing

Published by skeptic

The CAPE project develops a computer architecture for efficient Edge-Cloud. Locally deployed powerful edge-cloud Infrastructure is needed to support AI-driven environments with networks of autonomous devices to maintain their context and individual and shared states. This allows the devices to work together in federation towards individual and shared goals. To scale sustainably, this infrastructure must be provided as a service and built on composable hardware foundations. Compute, memory, storage, and accelerators must dynamically self-configure to maximise utilisation, minimise waste, and adapt capacity and heterogeneity to local needs delivering cloud-class performance through decentralised, fine-grained deployment. Fig. 1: CAPE vision of composable edge micro data centres within the Edge–Cloud Continuum. The EU-funded CAPE (European Open Compute Architecture for Powerful Edge) project addresses this gap by establishing edge micro data centres as a new, composable building block of the Edge–Cloud Continuum. CAPE combines open hardware, open-source software, and open standards to enable flexible, efficient, and sovereign edge computing across Europe. Edge hardware platforms: Composable by design CAPE rethinks edge servers as pools of dynamically composable resources rather than …

Design enablement teams under the European Chips Act

Design enablement teams under the European Chips Act

Published by skeptic

VUO-IC as Finland’s gateway to making complex SoCs a reality. Europe’s ambition to strengthen its semiconductor and electronics value chains has been clearly articulated through the European Chips Act. Beyond headline investments in manufacturing capacity, pilot lines, and research infrastructures, the Chips Act recognises a more subtle but equally critical challenge: turning ideas, architectures, and system concepts into functional devices on silicon. For many European companies–especially SMEs, deep-tech startups, and system houses–the primary bottleneck is not creativity, but access to design execution capability. Advanced SoC development, mixed-signal integration, RF, photonics, and emerging More-than-Moore technologies require specialised workflows, reusable IP, experienced teams, and early access to prototyping paths. Building this capability independently is time-consuming, capital-intensive, and often takes the focus away from what’s important for business. To address this gap, the Chips Act introduced Design Enablement Teams (DETs) as part of the broader European Chip Design Platform (EuroCDP). DETs act as structured, application-oriented entry points into Europe’s semiconductor ecosystem. Their role is not to replace commercial design houses or academic research, but to connect users to …

The great computer science exodus (and where students are going instead)

The great computer science exodus (and where students are going instead)

Published by skeptic

Something strange happened at University of California campuses this fall. For the first time since the dot-com crash, computer science enrollment dropped. System-wide, it fell 6% this year after declining 3% in 2024, according to reporting this past week by the San Francisco Chronicle. Even as overall college enrollment climbed 2% nationally — according to January data from the National Student Clearinghouse Research Center — students are bailing on traditional CS degrees. The one exception is UC San Diego — the only UC campus that added a dedicated AI major this fall. This all might look like a temporary blip tied to news about fewer CS grads finding work out of college. But it’s more likely an indicator of the future, one that China is much more enthusiastically embracing. As MIT Technology Review reported last July, Chinese universities have leaned hard into AI literacy, treating AI not as a threat but instead as essential infrastructure. Nearly 60% of Chinese students and faculty now use AI tools multiple times daily, and schools like Zhejiang University have …

Building a shared operating model in the semiconductor industry

Building a shared operating model in the semiconductor industry

Published by skeptic

Krish Dharma, Strategic Advisor for the SEMI Supply Chain Management (SCM) Initiative, explains how the semiconductor industry is moving from fragmented insight to coordinated resilience – by building a capability-led blueprint that allows companies to anticipate disruption, improve capital efficiency, and respond faster without compromising competitive advantage. The global semiconductor supply chain has entered a new phase. Disruption is no longer an occasional shock, but a structural condition shaped by geopolitical realignment, AI-driven demand growth, climate risk, and unprecedented capital intensity. While individual companies have invested heavily in digital tools and internal resilience, the broader ecosystem still struggles to respond coherently to systemic risk. Data remains fragmented across tiers, trust is limited, and decisions are often made in isolation. Coordination typically begins only once a disruption is already unfolding, leading to amplified volatility, misaligned capacity investments, slow response times, and inefficient use of capital. The challenge is not a lack of capability at the company level. It is the absence of a neutral, global industry-level operating model that enables companies to anticipate disruption and act …

EU launches €2.5bn NanoIC semiconductor manufacturing facility

EU launches €2.5bn NanoIC semiconductor manufacturing facility

Published by skeptic

Europe has taken a decisive step to secure its place in the global chip race with the launch of NanoIC, the largest pilot line created under the European Chips Act. Opened at IMEC in Leuven, the €2.5bn facility is set to transform semiconductor manufacturing in Europe by enabling the development of chips beyond the two-nanometre node and accelerating the journey from research to industrial production. A strategic boost for Europe’s chip ambitions NanoIC represents one of the most significant public-private investments ever made in European semiconductor manufacturing. Of the total funding, €700m comes from the EU, a further €700m from national and regional governments, and the remaining investment from industry partners, including ASML. The facility will focus on developing cutting-edge chip technologies that underpin artificial intelligence, autonomous vehicles, advanced healthcare systems and future 6G mobile networks. The opening comes at a pivotal moment for Europe’s digital strategy. Almost four years after European Commission President Ursula von der Leyen first announced the Chips Act, NanoIC is now operational as the EU simultaneously consults industry on a …